Project 4-3: Specifying Computer Systems for Field-Deployable and On-Board Systems

Principal Investigators: Patricia Teller and Sarala Arunagiri (University of Texas at El Paso)

Weight and space constraints greatly limit the amount of computer hardware that can be carried on an aircraft or land vehicle. This, in turn, limits the extent of radar and other image processing that can be performed on board. Often, less compute-intensive algorithms are used at the expense of design flexibility and image quality. This has changed in recent years as small, powerful terascale processing units, such as graphics processing units (GPUs), can execute more capable compute-intensive algorithms.

Hardware accelerators (GPUs, field-programmable gate arrays, and solid state devices) are gaining acceptance in on-board systems because of their efficiency in performing the repetitive, specialized tasks typical of radar processing and machine vision. General-purpose central processing units (CPUs) can then concentrate on the data-dependent control operations at which they excel.

AHPCRC researchers are evaluating the precision and power consumption characteristics of the algorithms used in various types and levels of image processing calculations, such as stereo vision and synthetic aperture radar backprojection. They are evaluating the trade-offs between precision and performance, and working to achieve optimal data quality for a given expenditure of power and computational resources.

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